Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US13457042Application Date: 2012-04-26
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Publication No.: US08687440B2Publication Date: 2014-04-01
- Inventor: Masahisa Iida
- Applicant: Masahisa Iida
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2009-275649 20091203
- Main IPC: G11C7/06
- IPC: G11C7/06

Abstract:
At a succeeding stage of a sense amplifier, a first data latch is provided which has the same bit number as the page length and is controlled to invariably hold the same data as that of the sense amplifier. When a column address strobe (CAS) access begins, data is transferred from the first data latch to an error checking and correcting circuit, and error correction and parity generation are performed in a pipeline process. As a result, the CAS access time and the CAS cycle time are reduced.
Public/Granted literature
- US20120213016A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-08-23
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