Invention Grant
- Patent Title: Multi-port memory based on DRAM core
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Application No.: US13601475Application Date: 2012-08-31
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Publication No.: US08687456B2Publication Date: 2014-04-01
- Inventor: Ayako Sato , Masato Matsumiya
- Applicant: Ayako Sato , Masato Matsumiya
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Kawasaki
- Agency: Arent Fox LLP
- Priority: JP2000-387891 20001220; JP2000-398893 20001227; JP2000-399052 20001227; JP2001-034361 20010209; JP2001-037547 20010214; JP2002-070514 20020314
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A semiconductor memory device includes a plurality of N external ports, each of which receives commands, and an internal circuit which performs at least N access operations during a minimum interval of the commands that are input into one of the external ports.
Public/Granted literature
- US20130205100A1 MULTI-PORT MEMORY BASED ON DRAM CORE Public/Granted day:2013-08-08
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