Invention Grant
US08688432B2 Method, apparatus and full-system simulator for speeding MMU simulation
失效
用于加速MMU模拟的方法,装置和全系统模拟器
- Patent Title: Method, apparatus and full-system simulator for speeding MMU simulation
- Patent Title (中): 用于加速MMU模拟的方法,装置和全系统模拟器
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Application No.: US12259891Application Date: 2008-10-28
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Publication No.: US08688432B2Publication Date: 2014-04-01
- Inventor: Ahmed Gheith , Hua Yong Wang , Kun Wang , Yu Zhang
- Applicant: Ahmed Gheith , Hua Yong Wang , Kun Wang , Yu Zhang
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Anne Vachon Dougherty
- Agent William Stock
- Priority: CN200710167039 20071031
- Main IPC: G06F9/455
- IPC: G06F9/455

Abstract:
A method, apparatus, and full-system simulator for speeding memory management unit simulation with direct address mapping on a host system, the host system supporting a full-system simulator, on which a guest system is simulated, the method comprising the following steps: setting a border in the logical space assigned for the full-system simulator by the host system, thereby dividing the logical space into a safe region and a simulator occupying region; shifting the full-system simulator itself from the occupied original host logical space to the simulator occupying region; and reserving the safe region for use with at least part of the guest system.
Public/Granted literature
- US20090119089A1 METHOD, APPARATUS AND FULL-SYSTEM SIMULATOR FOR SPEEDING MMU SIMULATION Public/Granted day:2009-05-07
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