Invention Grant
US08688432B2 Method, apparatus and full-system simulator for speeding MMU simulation 失效
用于加速MMU模拟的方法,装置和全系统模拟器

Method, apparatus and full-system simulator for speeding MMU simulation
Abstract:
A method, apparatus, and full-system simulator for speeding memory management unit simulation with direct address mapping on a host system, the host system supporting a full-system simulator, on which a guest system is simulated, the method comprising the following steps: setting a border in the logical space assigned for the full-system simulator by the host system, thereby dividing the logical space into a safe region and a simulator occupying region; shifting the full-system simulator itself from the occupied original host logical space to the simulator occupying region; and reserving the safe region for use with at least part of the guest system.
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