A tiled memory and a method of power management within the tiled memory provides efficient use of energy within a computer storage, which may be a spiral cache memory. The tiled memory is power-managed by placing tiles in a power-saving state, which may be a state in which storage circuits are powered-down and network circuits are powered-up, so that for serially-connected tiles, information can still be forwarded by a tile in the power-saving state. The tiles may be power managed under direction of a central controlled, which sends commands to the tiles to enter and leave the power-saving state, or the tiles may self-manage their power-saving state according to activity measured at the individual tiles. Activity may be measured at the tiles of a spiral cache by comparing a hit rate and a push back rate to corresponding thresholds. The measurements may be used with either tile-managed or centrally-managed techniques.