Invention Grant
- Patent Title: Method of semiconductor integrated circuit fabrication
- Patent Title (中): 半导体集成电路制造方法
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Application No.: US13471649Application Date: 2012-05-15
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Publication No.: US08691655B2Publication Date: 2014-04-08
- Inventor: Tzu-Yen Hsieh , Ming-Ching Chang , Yuan-Sheng Huang , Ming-Chia Tai , Chao-Cheng Chen
- Applicant: Tzu-Yen Hsieh , Ming-Ching Chang , Yuan-Sheng Huang , Ming-Chia Tai , Chao-Cheng Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02

Abstract:
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a semiconductor device, patterning a first hard mask to form a first recess in a high-resistor (Hi-R) stack, removing the first hard mask, forming a second recess in the Hi-R stack, forming a second hard mask in the second recess in the Hi-R stack. A HR can then be formed in the semiconductor substrate by the second hard mask and a gate trench etch.
Public/Granted literature
- US20130309834A1 METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION Public/Granted day:2013-11-21
Information query
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