Invention Grant
- Patent Title: Method for manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US13236716Application Date: 2011-09-20
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Publication No.: US08692311B2Publication Date: 2014-04-08
- Inventor: Hiroshi Shinohara , Daigo Ichinose
- Applicant: Hiroshi Shinohara , Daigo Ichinose
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-067633 20110325
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include selectively implanting an impurity into a underlying layer containing silicon using a mask to form a boron-added region and an etched region. The boron-added region contains boron, and a boron concentration of the etched region is lower than a boron concentration in the boron added region. The method can include forming a pair of holes reaching the etched region in the stacked body including a plurality of layers of electrode layers. The method can include forming a depression part connected to a lower end of each of the pair of holes in the underlying layer by removing the etched region through the holes using an etching solution.
Public/Granted literature
- US20120244673A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2012-09-27
Information query
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