Invention Grant
- Patent Title: Conversion of a two-wire bus into a single-wire bus
- Patent Title (中): 将双线总线转换为单线总线
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Application No.: US13189830Application Date: 2011-07-25
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Publication No.: US08694710B2Publication Date: 2014-04-08
- Inventor: Gilles Bas , Hervé Chalopin , François Tailliet
- Applicant: Gilles Bas , Hervé Chalopin , François Tailliet
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: FR1056149 20100727
- Main IPC: G06F13/42
- IPC: G06F13/42 ; G06F13/38 ; G06F13/40

Abstract:
A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.
Public/Granted literature
- US20120030388A1 CONVERSION OF A TWO-WIRE BUS INTO A SINGLE-WIRE BUS Public/Granted day:2012-02-02
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