Invention Grant
- Patent Title: Systems and methods for super-threading of integrated circuit design programs
- Patent Title (中): 集成电路设计程序超线程的系统和方法
-
Application No.: US13031215Application Date: 2011-02-20
-
Publication No.: US08694931B1Publication Date: 2014-04-08
- Inventor: Denis Baylor
- Applicant: Denis Baylor
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Alford Law Group, Inc.
- Agent Tobi C. Clinton
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
In one embodiment of the invention, a method is disclosed including receiving a netlist of an integrated circuit design; executing a first copy of an integrated circuit design program with a first processor associated with a first memory space to independently perform work on a first portion of the integrated circuit design; and executing a second copy of the integrated circuit design program with a second processor associated with a second memory space to independently perform work on a second portion of the integrated circuit design; wherein the second memory space is independent of the first memory space.
Information query