Invention Grant
- Patent Title: Reduced substrate coupling for inductors in semiconductor devices
- Patent Title (中): 降低半导体器件中电感器的衬底耦合
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Application No.: US12724904Application Date: 2010-03-16
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Publication No.: US08697517B2Publication Date: 2014-04-15
- Inventor: Harry Hak-Lay Chuang , Ming Zhu , Lee-Wee Teo
- Applicant: Harry Hak-Lay Chuang , Ming Zhu , Lee-Wee Teo
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8242
- IPC: H01L21/8242

Abstract:
The present disclosure provides reduced substrate coupling for inductors in semiconductor devices. A method of fabricating a semiconductor device having reduced substrate coupling includes providing a substrate having a first region and a second region. The method also includes forming a first gate structure over the first region and a second gate structure over the second region, wherein the first and second gate structures each include a dummy gate. The method next includes forming an inter layer dielectric (ILD) over the substrate and forming a photoresist (PR) layer over the second gate structure. Then, the method includes removing the dummy gate from the first gate structure, thereby forming a trench and forming a metal gate in the trench so that a transistor may be formed in the first region, which includes a metal gate, and an inductor component may be formed over the second region, which does not include a metal gate.
Public/Granted literature
- US20110227167A1 REDUCED SUBSTRATE COUPLING FOR INDUCTORS IN SEMICONDUCTOR DEVICES Public/Granted day:2011-09-22
Information query
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