Invention Grant
- Patent Title: Method of manufacturing a semiconductor device which includes forming a silicon layer without void and cutting on a silicon monolayer
- Patent Title (中): 一种制造半导体器件的方法,包括在硅单层上形成无空隙和切割的硅层
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Application No.: US13567320Application Date: 2012-08-06
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Publication No.: US08697519B2Publication Date: 2014-04-15
- Inventor: Junggeun Jee , Woosung Lee
- Applicant: Junggeun Jee , Woosung Lee
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-Si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2011-0106459 20111018
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
Methods of manufacturing a semiconductor device are provided. Patterns having a recess region defined therebetween are formed on a substrate, and then a silicon precursor having an organic ligand is provided on the substrate to absorb silicon on sidewalls and a bottom surface of the recess region to form a silicon monolayer on the patterns having the recess region defined therebetween. A silicon layer without void and cutting is formed on the silicon monolayer.
Public/Granted literature
- US20130095622A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Public/Granted day:2013-04-18
Information query
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