Invention Grant
US08698222B2 Memory device with charge storage layers at the gaps located both sides of the gate dielectric underneath the gate
有权
在位于栅极下方的栅极电介质的两侧的间隙处具有电荷存储层的存储器件
- Patent Title: Memory device with charge storage layers at the gaps located both sides of the gate dielectric underneath the gate
- Patent Title (中): 在位于栅极下方的栅极电介质的两侧的间隙处具有电荷存储层的存储器件
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Application No.: US13304380Application Date: 2011-11-24
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Publication No.: US08698222B2Publication Date: 2014-04-15
- Inventor: Shih-Guei Yan , Wen-Jer Tsai , Cheng-Hsien Cheng
- Applicant: Shih-Guei Yan , Wen-Jer Tsai , Cheng-Hsien Cheng
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L21/8238
Abstract:
A memory device is described, including a tunnel dielectric layer over a substrate, a gate over the tunnel dielectric layer, at least one charge storage layer between the gate and the tunnel dielectric layer, two doped regions in the substrate beside the gate, and a word line that is disposed on and electrically connected to the gate and has a thickness greater than that of the gate.
Public/Granted literature
- US20130134498A1 MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2013-05-30
Information query
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