Invention Grant
- Patent Title: Semiconductor device having delay line
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Application No.: US13585110Application Date: 2012-08-14
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Publication No.: US08698535B2Publication Date: 2014-04-15
- Inventor: Katsuhiro Kitagawa
- Applicant: Katsuhiro Kitagawa
- Agency: Foley & Lardner LLP
- Priority: JP2011-177803 20110816
- Main IPC: H03H11/26
- IPC: H03H11/26

Abstract:
Disclosed herein is a device that includes a plurality of one-shot pulse generation circuits connected in series between an input node and an output node. Each of the one-shot pulse generation circuits receives an input clock signal supplied from previously connected one-shot pulse generation circuit to output an output clock signal to subsequently connected one-shot pulse generation circuit. Both of a rising edge and a falling edge of the output clock signal are controlled based on one of a rising edge and a falling edge of the input clock signal. A time period from one of the rising edge and the falling edge of the output clock signal to the other of the rising edge and the falling edge of the output clock signal being variable.
Public/Granted literature
- US20130043919A1 SEMICONDUCTOR DEVICE HAVING DELAY LINE Public/Granted day:2013-02-21
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