Invention Grant
US08698538B2 Multivoltage clock synchronization 有权
多电平时钟同步

Multivoltage clock synchronization
Abstract:
A level converter circuit is disclosed. The level converter circuit includes a first level converter that generates a first output signal, and a second level converter that generates a second output signal. The level converter circuit further includes an edge selector coupled to the first level converter and the second level converter that selects a rising edge of either the first output signal or the second output signal, and selects a falling edge of either the first output signal or the second output signal to generate an optimized output signal.
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