Invention Grant
- Patent Title: DRAM security erase
- Patent Title (中): DRAM安全擦除
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Application No.: US13291297Application Date: 2011-11-08
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Publication No.: US08699263B2Publication Date: 2014-04-15
- Inventor: Michael C. Parris
- Applicant: Michael C. Parris
- Applicant Address: US CA San Jose
- Assignee: Tessera, Inc.
- Current Assignee: Tessera, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Priority: KR10-2011-0087736 20110831
- Main IPC: G11C11/24
- IPC: G11C11/24

Abstract:
In a method of erasing data, a wordline of the DRAM array is set active, and signals develop on bitlines according to flows of charge between memory cells coupled to the wordline and the respective bitlines. Sense amplifiers connected to the respective bitlines can remain off such that the sense amplifiers do not amplify the signals to storable signal levels. Thereafter, when the wordline is set inactive again, insufficient charge remains in the memory cells coupled to the wordline to represent data such that the data stored in memory cells coupled to the wordline are erased. These steps can be performed using each of the wordlines of a selected range of the DRAM array or all of the DRAM array so as to erase the data stored in the selected range or in all of the DRAM array.
Public/Granted literature
- US20130051127A1 DRAM SECURITY ERASE Public/Granted day:2013-02-28
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