Invention Grant
US08699619B2 Dutycycle adjustment to improve efficiency of a digital RF-PA
有权
Dutycycle调整以提高数字RF-PA的效率
- Patent Title: Dutycycle adjustment to improve efficiency of a digital RF-PA
- Patent Title (中): Dutycycle调整以提高数字RF-PA的效率
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Application No.: US12941216Application Date: 2010-11-08
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Publication No.: US08699619B2Publication Date: 2014-04-15
- Inventor: Hendrik Visser , Roeland Heijna , Norbert Van Den Bos
- Applicant: Hendrik Visser , Roeland Heijna , Norbert Van Den Bos
- Applicant Address: CH Plan-les-Ouates
- Assignee: Ericsson Modems SA
- Current Assignee: Ericsson Modems SA
- Current Assignee Address: CH Plan-les-Ouates
- Agency: Coats & Bennett, P.L.L.C.
- Main IPC: H04K1/02
- IPC: H04K1/02 ; H04L25/03 ; H04L25/49

Abstract:
An amplification unit reduces a duty cycle of a digital signal at a carrier radio frequency to optimize the efficiency of the RF power amplifier that amplifies the reduced duty cycle signal. An exemplary amplification unit includes a duty cycle controller and a digital power amplifier. A delay unit in the duty cycle controller applies a delay to an input digital signal at the carrier radio frequency to generate a delayed signal at the carrier radio frequency. A logic gate in the duty cycle controller logically combines the input digital signal with the delayed signal to generate a modified digital signal at the carrier radio frequency, where the modified input digital signal has a reduced duty cycle relative to that of the input digital signal. Amplifying the modified digital signal in the digital RF power amplifier generates an amplified analog signal at the carrier radio frequency while improving amplifier efficiency.
Public/Granted literature
- US20120081179A1 DUTYCYCLE ADJUSTMENT TO IMPROVE EFFICIENCY OF A DIGITAL RF-PA Public/Granted day:2012-04-05
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