Invention Grant
- Patent Title: Design, layout, and manufacturing techniques for multivariant integrated circuits
- Patent Title (中): 多变量集成电路的设计,布局和制造技术
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Application No.: US13084364Application Date: 2011-04-11
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Publication No.: US08701057B2Publication Date: 2014-04-15
- Inventor: Brian Kelleher
- Applicant: Brian Kelleher
- Applicant Address: US CA Santa Clara
- Assignee: Nvidia Corporation
- Current Assignee: Nvidia Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An integrated circuit (IC) is designed that includes one variant having a plurality of a modular circuits communicatively coupled together and a second variant having a sub-set of the plurality of modular circuits. The modular circuits are then laid out on a wafer for fabricating each of the variants of the IC. The layout includes routing communicative couplings between the sub-set of the modular circuits of the second variant to the other modular circuits of the first variant in one or more metallization layers to be fabricated last. Fabricating the IC is then started, up to but not including the one or more metallization layers to be fabricated last. One or more of the plurality of variants of the IC is selected based upon a demand predicted during fabrication. Fabrication then continues with the last metallization layers of the IC according to the selected layout.
Public/Granted literature
- US20120258579A1 DESIGN, LAYOUT, AND MANUFACTURING TECHNIQUES FOR MULTIVARIANT INTEGRATED CIRCUITS Public/Granted day:2012-10-11
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