Invention Grant
- Patent Title: Bottom-notched SiGe FinFET formation using condensation
- Patent Title (中): 底部缺口SiGe使用冷凝的FinFET形成
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Application No.: US13794458Application Date: 2013-03-11
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Publication No.: US08703565B2Publication Date: 2014-04-22
- Inventor: Chih-Hao Chang , Jeffrey Junhao Xu , Chien-Hsun Wang , Chih-Hsiang Chang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.
Public/Granted literature
- US20130196478A1 Bottom-Notched SiGe FinFET Formation Using Condensation Public/Granted day:2013-08-01
Information query
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