Invention Grant
- Patent Title: Power semiconductor devices and methods
- Patent Title (中): 功率半导体器件及方法
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Application No.: US13670019Application Date: 2012-11-06
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Publication No.: US08704302B2Publication Date: 2014-04-22
- Inventor: Amit Paul , Mohamed N. Darwish
- Applicant: MaxPower Semiconductor, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: MaxPower Semiconductor, Inc.
- Current Assignee: MaxPower Semiconductor, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Groover & Associates PLLC
- Agent Robert O. Groover, III; Gwendolyn S. S. Groover
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
The present inventors have realized that manufacturability plays into optimization of power semiconductor devices in some surprising new ways. If the process window is too narrow, the maximum breakdown voltage will not be achieved due to doping variations and the like normally seen in device fabrication. Thus, among other teachings, the present application describes some ways to improve the process margin, for a given breakdown voltage specification, by actually reducing the maximum breakdown voltage. In one class of embodiments, this is done by introducing a vertical gradation in the density of fixed electrostatic charge, or in the background doping of the drift region, or both. Several techniques are disclosed for achieving this.
Public/Granted literature
- US20130299899A1 Power Semiconductor Devices and Methods Public/Granted day:2013-11-14
Information query
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