Invention Grant
US08705313B2 DDR PSRAM and data writing and reading methods thereof 有权
DDR PSRAM及其数据写入和读取方法

DDR PSRAM and data writing and reading methods thereof
Abstract:
A double data rate pseudo SRAM (DDR PSRAM) is provided. The DDR PSRAM includes a data receiver, a memory and an address decoder. The data receiver receives a first single data rate data from a controller via a common bus according to a clock. The address decoder decodes the first single data rate data to obtain an address of the memory. The data receiver stores the double data rate data into the address of the memory. The DDR PSRAM also includes a data transmitter and a data strobe generating unit. The data transmitter obtains data stored in the address of the memory and provides a double data rate data to the controller according to the obtained data, and the data strobe generating unit a data strobe signal to the controller and toggling the data strobe signal in response to the double data rate data.
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