Invention Grant
US08705657B2 Digital signal processing circuit for generating output signal according to non-overlapping clock signals and input bit streams and related wireless communication transmitters
有权
数字信号处理电路，用于根据不重叠的时钟信号和输入比特流以及相关的无线通信发射机产生输出信号
- Patent Title: Digital signal processing circuit for generating output signal according to non-overlapping clock signals and input bit streams and related wireless communication transmitters
- Patent Title (中): 数字信号处理电路，用于根据不重叠的时钟信号和输入比特流以及相关的无线通信发射机产生输出信号
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Application No.: US13159385Application Date: 2011-06-13
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Publication No.: US08705657B2Publication Date: 2014-04-22
- Inventor: Jie-Wei Lai , Yang-Chuan Chen
- Applicant: Jie-Wei Lai , Yang-Chuan Chen
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H03C3/00
- IPC: H03C3/00
Abstract:
A digital signal processing circuit includes a combining stage and an output stage. The combining stage is arranged to receive a plurality of non-overlapping clock signals having a same frequency but different phases, receive a plurality of first input bit streams, and generate a first output bit stream by combining the first input bit streams according to the non-overlapping clock signals. The output stage is arranged to generate an output according to the first output bit stream. A digital signal processing method includes: receiving a plurality of non-overlapping clock signals having a same frequency but different phases; receiving a plurality of first input bit streams; generating a first output bit stream by combining the first input bit streams according to the non-overlapping clock signals; and generating an output according to the first output bit stream.
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