Invention Grant
US08707011B1 Memory access techniques utilizing a set-associative translation lookaside buffer
有权
使用集合关联翻译后备缓冲器的存储器访问技术
- Patent Title: Memory access techniques utilizing a set-associative translation lookaside buffer
- Patent Title (中): 使用集合关联翻译后备缓冲器的存储器访问技术
-
Application No.: US11588177Application Date: 2006-10-24
-
Publication No.: US08707011B1Publication Date: 2014-04-22
- Inventor: David B. Glasco , Lingfeng Yuan
- Applicant: David B. Glasco , Lingfeng Yuan
- Applicant Address: US CA Santa Clara
- Assignee: Nvidia Corporation
- Current Assignee: Nvidia Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28

Abstract:
A memory access technique, in accordance with one embodiment of the present invention, includes caching page size data for use in accessing a set-associative translation lookaside buffer (TLB). The technique utilizes a translation lookaside buffer data structure that includes a page size table and a translation lookaside buffer. Upon receipt of a memory access request a page size is looked-up in the page size table utilizing the page directory index in the virtual address. A set index is calculated utilizing the page size. A given set of entries is then looked-up in the translation lookaside buffer utilizing the set index. The virtual address is compared to each TLB entry in the given set. If the comparison results in a TLB hit, the physical address is received from the matching TLB entry.
Information query