Invention Grant
US08711983B2 Phase locking loop 有权
锁相环

Phase locking loop
Abstract:
A phase-locking loop (PLL) for use with orthogonal frequency division multiplexed signals. In one embodiment, a wireless receiver includes a PLL is configured to reduce phase and frequency divergence between the wireless receiver and a transmitter of a packet received by the wireless receiver. The PLL includes a loop bandwidth controller. The loop bandwidth controller is configured to set a bandwidth of the PLL to a first value for reception of an initial symbol of the packet. The loop bandwidth controller is configured to reduce the bandwidth of the PLL over a number of symbols preceding an initial header of the packet.
Public/Granted literature
Information query
Patent Agency Ranking
0/0