Invention Grant
- Patent Title: Method for plating a semiconductor package lead
- Patent Title (中): 电镀半导体封装引线的方法
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Application No.: US13562398Application Date: 2012-07-31
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Publication No.: US08716066B2Publication Date: 2014-05-06
- Inventor: Leo M. Higgins, III
- Applicant: Leo M. Higgins, III
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Joanna G. Chiu; Mary Jo Bertani
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method of forming a packaged semiconductor device includes loading an array of package sites in position for saw singulation, saw singulating the array of package sites, and performing a non-electrolytic plating operation on exposed lead tips of individual packages from the array of package sites as the array of package sites is saw singulated.
Public/Granted literature
- US20140038356A1 METHOD FOR PLATING A SEMICONDUCTOR PACKAGE LEAD Public/Granted day:2014-02-06
Information query
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