Invention Grant
US08716401B2 Semiconductor chip laminate and adhesive composition for semiconductor chip lamination
有权
用于半导体芯片层叠的半导体芯片层压板和粘合剂组合物
- Patent Title: Semiconductor chip laminate and adhesive composition for semiconductor chip lamination
- Patent Title (中): 用于半导体芯片层叠的半导体芯片层压板和粘合剂组合物
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Application No.: US12625862Application Date: 2009-11-25
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Publication No.: US08716401B2Publication Date: 2014-05-06
- Inventor: Yasunori Karasawa , Isao Ichikawa
- Applicant: Yasunori Karasawa , Isao Ichikawa
- Applicant Address: JP
- Assignee: Lintec Corporation
- Current Assignee: Lintec Corporation
- Current Assignee Address: JP
- Agency: The Webb Law Firm
- Priority: JP2008-303743 20081128
- Main IPC: C08L63/00
- IPC: C08L63/00 ; C08L63/02 ; C08L63/04 ; H05K1/02

Abstract:
A semiconductor chip laminate comprises a plurality of semiconductor chips and an adhesive layer through which the plurality of semiconductor chips are laminated, wherein the adhesive layer is composed of an adhesive composition comprising an acrylic polymer (A); an epoxy resin (B); a thermal curing agent (C); and a certain organophosphonium compound (D) as a thermal curing accelerator, and the content of the organophosphonium compound (D) relative to 100 parts by weight in total of the epoxy resin (B) and the thermal curing agent (C) is 0.001 to 15 parts by weight.
Public/Granted literature
- US20100133703A1 Semiconductor Chip Laminate and Adhesive Composition for Semiconductor Chip Lamination Public/Granted day:2010-06-03
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