Invention Grant
- Patent Title: Dynamic memory device with improved bitline connection region
- Patent Title (中): 具有改进的位线连接区域的动态存储器件
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Application No.: US13271495Application Date: 2011-10-12
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Publication No.: US08716773B2Publication Date: 2014-05-06
- Inventor: Koji Taniguchi
- Applicant: Koji Taniguchi
- Agency: Sughrue Mion, PLLC
- Priority: JP2010-229812 20101012
- Main IPC: H01L27/108
- IPC: H01L27/108
Abstract:
A semiconductor device includes a semiconductor substrate having a memory cell region and a peripheral circuit region; a bit line extending over the memory cell region and the peripheral circuit region, the bit line including a first portion in the peripheral circuit region; and a sense amplifier in the peripheral circuit region. The sense amplifier includes a transistor having a gate electrode which includes the first portion of the bit line.
Public/Granted literature
- US20120086063A1 SEMICONDUCTOR DEVICE Public/Granted day:2012-04-12
Information query
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