Invention Grant
- Patent Title: Split loop cut pattern for spacer process
- Patent Title (中): 用于间隔工艺的分割环切割图案
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Application No.: US14092289Application Date: 2013-11-27
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Publication No.: US08716857B2Publication Date: 2014-05-06
- Inventor: Kiyonori Ogisu , Yosuke Takahata
- Applicant: SanDisk Technologies Inc.
- Applicant Address: US TX Plano
- Assignee: SanDisk Technologies Inc.
- Current Assignee: SanDisk Technologies Inc.
- Current Assignee Address: US TX Plano
- Agency: Vierra Magen Marcus LLP
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor fabrication technique cuts loops formed in a spacer pattern. The spacer pattern is a split loop pattern which generally includes a symmetric arrangement of one or more loops in each of four quadrants which are defines with respect to a reference point. The loops can be peaks or trenches. Each quadrant can include one loop, or multiple nested loops. Further, the space pattern includes a single cross, or multiple nested crosses, which extend between the loops. A cut out area is defined which extends outward from the reference point to closed ends of the loops, also encompassing a central portion of the cross. When a metal wiring layer pattern is formed using the spacer pattern with the cut out area, metal wiring is excluded from the cut out area. The loop ends in the metal wiring layer are broken and can be used as independent active lines.
Public/Granted literature
- US20140084451A1 Split Loop Cut Pattern For Spacer Process Public/Granted day:2014-03-27
Information query
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