Invention Grant
US08716868B2 Semiconductor module for stacking and stacked semiconductor module
有权
用于堆叠和堆叠半导体模块的半导体模块
- Patent Title: Semiconductor module for stacking and stacked semiconductor module
- Patent Title (中): 用于堆叠和堆叠半导体模块的半导体模块
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Application No.: US12783836Application Date: 2010-05-20
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Publication No.: US08716868B2Publication Date: 2014-05-06
- Inventor: Takeshi Kawabata , Takashi Yui
- Applicant: Takeshi Kawabata , Takashi Yui
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: JP2009-121483 20090520; KR10-2010-0034715 20100415
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A pad (15) is provided on a surface connecting a first substrate (11) of a lower layer module with an upper layer module, the pad is partially covered by an insulating film (20) to form an opening section (3) exposing the pad (15), a first connection terminal (2) is formed on the lower surface of the first substrate (11) of the lower layer module, the planar shape of the opening section (3) is different from the planar shape of the first connection terminal (2), the outer shape of the opening section (3) is larger than the first connection terminal (2), and in a transmissive inspection from above, the shape of the lower end of a second connection terminal (30) spreading in the opening section (3) is not concealed by the other terminal. This configuration enables easy and reliable determination of whether bonding sections are satisfactory by a non-destructive inspection.
Public/Granted literature
- US20100295186A1 SEMICONDUCTOR MODULE FOR STACKING AND STACKED SEMICONDUCTOR MODULE Public/Granted day:2010-11-25
Information query
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