Invention Grant
- Patent Title: Big via structure
- Patent Title (中): 大通道结构
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Application No.: US13397488Application Date: 2012-02-15
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Publication No.: US08716871B2Publication Date: 2014-05-06
- Inventor: Uway Tseng , Shu-Hui Su
- Applicant: Uway Tseng , Shu-Hui Su
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/485
- IPC: H01L23/485 ; H01L21/768
Abstract:
A semiconductor device that includes a first metal layer component formed over a substrate. The semiconductor device includes a via formed over the first metal layer component. The via has a recessed shape. The semiconductor device includes a second metal layer component formed over the via. The semiconductor device includes a first dielectric layer component formed over the substrate. The first dielectric layer component is located adjacent to, and partially over, the first metal layer component. The first dielectric layer component contains fluorine. The semiconductor device includes a second dielectric layer component formed over the first dielectric layer component. The first dielectric layer component and the second dielectric layer component are each located adjacent to the via. The second dielectric layer component is free of fluorine.
Public/Granted literature
- US20130207276A1 NOVEL PROCESS FOR FORMING A BIG VIA Public/Granted day:2013-08-15
Information query
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