Invention Grant
- Patent Title: Stacked semiconductor package including connections electrically connecting first and second semiconductor packages
- Patent Title (中): 堆叠的半导体封装包括电连接第一和第二半导体封装的连接
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Application No.: US13970071Application Date: 2013-08-19
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Publication No.: US08716872B2Publication Date: 2014-05-06
- Inventor: Heung-kyu Kwon , Su-chang Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2010-0100327 20101014
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L23/498

Abstract:
A stacked semiconductor package has a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, and a plurality of connections electrically connecting the first and second semiconductor packages. The connections are disposed on an outer region of the first package substrate outside the first semiconductor chip. The connections are disposed along opposite first longer sides and opposite shorter second sides of the first package substrate. The heights of those connections disposed along each longer first side gradually vary from a central to an outer region (i.e., the ends) of the longer first side.
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Information query
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