Invention Grant
US08717081B2 Non-overlapping clock generator 有权
非重叠时钟发生器

Non-overlapping clock generator
Abstract:
A non-overlapping clock generator including an enabling module and N pulse-generating modules connected as a ring is provided. When the ith input node has a high voltage level, the enabling module enables the ith pulse-generating module so as to trigger the ith pulse-generating module to discharge the ith input node. After the ith input node has been discharged to a low voltage level, the ith pulse-generating module charges the ith output node to the high voltage level.
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