A photodetecting device 1 includes a photodiode PD and an integrating circuit 11. The integrating circuit 11 includes an amplifier circuit 20, a capacitive element C2, and a second switch SW2. The amplifier circuit 20 has a driving section including a PMOS transistor T1 and an NMOS transistor T2, the respective drain terminals thereof being connected to each other. A first switch SW1 comprising a PMOS transistor T10 is opened or closed according to the level of a first reset signal Reset1 input to the gate terminal. When the first reset signal Reset1 is at a low level, the first switch SW1 is closed to apply a power supply potential VDD to the gate terminal of the PMOS transistor T1, thereby turning off the PMOS transistor T1. Thus, an amplifier circuit, an integrating circuit and a photodetecting device capable of achieving both low power consumption and high speed can be realized.