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US08717209B2 Successive equalizer for analog-to-digital converter (ADC) error correction 有权
用于模数转换器(ADC)误差校正的连续均衡器

Successive equalizer for analog-to-digital converter (ADC) error correction
Abstract:
Various pipeline ADCs are disclosed that substantially compensate for interference or distortion that results from imperfections with various ADC modules of the pipeline ADCs. The pipeline ADCs include various ADC stages and various compensation stages that are coupled to the various ADC stages. The various ADC stages convert their corresponding analog inputs from an analog signal domain to a digital signal domain to provide various digital output signals and various analog residual signals to subsequent ADC stages. The various compensation stages compensate for interference or distortion that is impressed onto the various analog residual signals which results from imperfections within previous ADC stages.
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