Invention Grant
- Patent Title: Compensation of back pattern effect in a memory device
- Patent Title (中): 在存储器件中补偿背面图案效果
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Application No.: US13790393Application Date: 2013-03-08
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Publication No.: US08717815B2Publication Date: 2014-05-06
- Inventor: Tommaso Vali , Violente Moschiano , Giovanni Santin
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Priority: ITRM2007A0621 20071128
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04 ; G11C29/00

Abstract:
In one or more of the disclosed embodiments, a read operation is compensated for back pattern effect. A bit line current is generated by a read operation that biases the word lines. As part of a back pattern effect measurement phase, at predetermined time intervals an indication of the discharge status of the bit line is stored in a latch of a set of N latches coupled to each bit line. At the end of the measurement phase, the set of latches contains a multiple bit word that is an indication of the back pattern effect experienced by that particular series string of memory cells. This back pattern effect indication is used in subsequent read operations to adjust the timing of the operation.
Public/Granted literature
- US20130188427A1 COMPENSATION OF BACK PATTERN EFFECT IN A MEMORY DEVICE Public/Granted day:2013-07-25
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