Invention Grant
US08719745B2 Method and system for automatically establishing hierarchical parameterized cell (PCELL) debugging environment
有权
自动建立层次化参数化单元（PCELL）调试环境的方法和系统
- Patent Title: Method and system for automatically establishing hierarchical parameterized cell (PCELL) debugging environment
- Patent Title (中): 自动建立层次化参数化单元（PCELL）调试环境的方法和系统
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Application No.: US13686560Application Date: 2012-11-27
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Publication No.: US08719745B2Publication Date: 2014-05-06
- Inventor: Li-Chien Ting , Nikolay Vladimirovich Anufriev , Alexey Nikolayevich Peskov , Serena Chiang Caluya , Chia-Fu Chen
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Rosenberg, Klein & Lee
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F9/455
Abstract:
A system and method are provided for establishing an automated debugging environment in an Electronic Design Automation (EDA) work flow for the debugging of parameterized cells (PCELLS/PyCELLS) in a layout. A user may merely select a particular PCELL within a hierarchical PCELL and the system and method will determine dependencies thereof. The source code for the selected PCELL and its dependencies may be located and loaded. At least one breakpoint may be set in the source code of the selected PCELL. The source code for the selected PCELL and its dependencies may be executed to be arrested at the set breakpoints. Upon the arrest of execution, a debugging environment may be established and the located source code of the selected PCELL may be displayed along with values for parametric components thereof and progression control tools.
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