Invention Grant
US08719806B2 Speculative multi-threading for instruction prefetch and/or trace pre-build
有权
用于指令预取和/或跟踪预构建的推测性多线程
- Patent Title: Speculative multi-threading for instruction prefetch and/or trace pre-build
- Patent Title (中): 用于指令预取和/或跟踪预构建的推测性多线程
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Application No.: US12879898Application Date: 2010-09-10
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Publication No.: US08719806B2Publication Date: 2014-05-06
- Inventor: Hong Wang , Tor M. Aamodt , Pedro Marcuello , Jared W. Stark, IV , John P. Shen , Antonio Gonzalez , Per Hammarlund , Gerolf F. Hoflehner , Perry H. Wang , Steve Shih-wei Liao
- Applicant: Hong Wang , Tor M. Aamodt , Pedro Marcuello , Jared W. Stark, IV , John P. Shen , Antonio Gonzalez , Per Hammarlund , Gerolf F. Hoflehner , Perry H. Wang , Steve Shih-wei Liao
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F9/45
- IPC: G06F9/45
Abstract:
The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is a speculative prefetch thread to perform instruction prefetch and/or trace pre-build for the main thread.
Public/Granted literature
- US20100332811A1 SPECULATIVE MULTI-THREADING FOR INSTRUCTION PREFETCH AND/OR TRACE PRE-BUILD Public/Granted day:2010-12-30
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