Invention Grant
- Patent Title: Method for manufacturing multilayer substrate with built-in chip-type electronic component
- Patent Title (中): 具有内置芯片型电子部件的多层基板的制造方法
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Application No.: US12774072Application Date: 2010-05-05
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Publication No.: US08720050B2Publication Date: 2014-05-13
- Inventor: Osamu Chikagawa , Norio Sakai
- Applicant: Osamu Chikagawa , Norio Sakai
- Applicant Address: JP Kyoto
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Kyoto
- Agency: Keating & Bennett, LLP
- Priority: JP2004-317313 20041029
- Main IPC: H05K3/30
- IPC: H05K3/30

Abstract:
A multilayer substrate having a built-in chip-type electronic component includes a ceramic laminate having a plurality of ceramic layers, a chip-type electronic component disposed in the ceramic laminate and having an external terminal electrode, and a via conductor disposed in the ceramic layers in the lamination direction. The external terminal electrode of the chip-type electronic component is connected to the via conductor, and a connection step is provided in at least one of the upper and lower end surfaces of the via conductor.
Public/Granted literature
- US20100212152A1 MULTILAYER SUBSTRATE WITH BUILT-IN CHIP-TYPE ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2010-08-26
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