Invention Grant
- Patent Title: Method for manufacturing double-layer polysilicon gate
- Patent Title (中): 制造双层多晶硅栅极的方法
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Application No.: US13729338Application Date: 2012-12-28
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Publication No.: US08722483B2Publication Date: 2014-05-13
- Inventor: Guangran Pan
- Applicant: Peking University Founder Group Co., Ltd. , Founder Microelectronics International Co., Ltd.
- Applicant Address: CN Beijing CN Shenzhen, Guangdong
- Assignee: Peking University Founder Group Co., Ltd.,Founder Microelectronics International Co., Ltd.
- Current Assignee: Peking University Founder Group Co., Ltd.,Founder Microelectronics International Co., Ltd.
- Current Assignee Address: CN Beijing CN Shenzhen, Guangdong
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
- Priority: CN201110448357 20111228
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
The invention discloses a method for manufacturing a dual-layer polysilicon gate. The method includes: depositing silicon nitride on silicon oxide of an integrated circuit to be processed; performing anisotropic etching on the silicon nitride to form sidewalls of silicon nitride on sidewalls of a first layer of polysilicon gate of the integrated circuit to be processed; manufacturing a second layer of polysilicon gate; and rinsing the sidewalls of silicon nitride.
Public/Granted literature
- US20130183821A1 METHOD FOR MANUFACTURING DOUBLE-LAYER POLYSILICON GATE Public/Granted day:2013-07-18
Information query
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