Invention Grant
US08722520B2 Method of fabricating a semiconductor device having an epitaxy region
有权
制造具有外延区域的半导体器件的方法
- Patent Title: Method of fabricating a semiconductor device having an epitaxy region
- Patent Title (中): 制造具有外延区域的半导体器件的方法
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Application No.: US13298529Application Date: 2011-11-17
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Publication No.: US08722520B2Publication Date: 2014-05-13
- Inventor: Mark van Dal
- Applicant: Mark van Dal
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/36

Abstract:
A method is described what includes providing a substrate having a first trench and a second trench. An epitaxy material (crystalline material) is formed in the first trench and in the second trench. The top surface of the epitaxy material in the first trench is noncollinear with a top surface of the epitaxy material in the second trench. An amorphous semiconductor layer is formed on the crystalline material. Subsequently, the amorphous layer is converted, in part or in whole, into the crystalline semiconductor material. In an embodiment, a planarization process after the conversion provides crystalline regions having a coplanar top surface.
Public/Granted literature
- US20120088344A1 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXY REGION Public/Granted day:2012-04-12
Information query
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