Invention Grant
- Patent Title: Semiconductor structure with dummy polysilicon lines
- Patent Title (中): 具有虚设多晶硅线的半导体结构
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Application No.: US13158133Application Date: 2011-06-10
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Publication No.: US08723265B2Publication Date: 2014-05-13
- Inventor: Yen-Huei Chen , Wei Min Chan , Shao-Yu Chou , Hung-Jen Liao
- Applicant: Yen-Huei Chen , Wei Min Chan , Shao-Yu Chou , Hung-Jen Liao
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L27/32

Abstract:
A multiple finger structure comprises a plurality of active regions placed between a pair of dummy POLY lines. The active regions comprise a plurality of multiple fingered NMOS transistors, which are part of a sense amplifier of an SRAM memory circuit. The drain and source of each multiple fingered NMOS transistor have an SiP/SiC epitaxial growth region. The active regions extend and overlap with the dummy POLY lines. The overlap between the active regions and the dummy POLY lines helps to reduce edge imperfection at the edge of the active regions.
Public/Granted literature
- US20120313177A1 Multiple Finger Structure Public/Granted day:2012-12-13
Information query
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