Invention Grant
US08723265B2 Semiconductor structure with dummy polysilicon lines 有权
具有虚设多晶硅线的半导体结构

Semiconductor structure with dummy polysilicon lines
Abstract:
A multiple finger structure comprises a plurality of active regions placed between a pair of dummy POLY lines. The active regions comprise a plurality of multiple fingered NMOS transistors, which are part of a sense amplifier of an SRAM memory circuit. The drain and source of each multiple fingered NMOS transistor have an SiP/SiC epitaxial growth region. The active regions extend and overlap with the dummy POLY lines. The overlap between the active regions and the dummy POLY lines helps to reduce edge imperfection at the edge of the active regions.
Public/Granted literature
Information query
Patent Agency Ranking
0/0