Methods and systems are disclosed for erasing split-gate non-volatile memory (NVM) cells using select-gate erase voltages that are adjusted to reduce select-gate to control-gate break-down failures. The adjusted select-gate erase voltages provide bias voltages on the select-gates that are configured to have the same polarity as the control-gate erase voltages applied during erase operations and that are different from select-gate read voltages applied during read operations. Certain additional embodiments use discrete charge storage layers for the split-gate NVM cells and include split-gate NVM cells having gap dielectric layer thicknesses that are dependent upon control gate dielectric layer widths.