Invention Grant
- Patent Title: Programmable packet processor with flow resolution logic
- Patent Title (中): 具有流分辨率逻辑的可编程数据包处理器
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Application No.: US13597060Application Date: 2012-08-28
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Publication No.: US08724632B2Publication Date: 2014-05-13
- Inventor: Jim Cathey , Timothy S. Michels
- Applicant: Jim Cathey , Timothy S. Michels
- Applicant Address: FR Paris
- Assignee: Alcatel Lucent
- Current Assignee: Alcatel Lucent
- Current Assignee Address: FR Paris
- Agency: Capitol Patent & Trademark Law Firm, PLLC
- Main IPC: H04L12/28
- IPC: H04L12/28 ; H04L12/56 ; H04L12/54

Abstract:
A programmable packet switching controller has a packet buffer, a pattern match module, a programmable packet classification engine and an application engine. The packet classification engine has a decision tree-based classification logic for classifying a packet. The application engine has a number of programmable sub-engines arrayed in a pipelined architecture. The sub-engines include a source lookup engine, a destination lookup engine and a disposition engine, which are used to make a disposition decision for the inbound packets in a processing pipeline.
Public/Granted literature
- US20130034101A1 Programmable Packet Processor With Flow Resolution Logic Public/Granted day:2013-02-07
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