Invention Grant
- Patent Title: Separate dies with interfaces and selection circuitry connected by leads
- Patent Title (中): 独立的裸片与接口连接的选择电路
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Application No.: US13765194Application Date: 2013-02-12
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Publication No.: US08726110B2Publication Date: 2014-05-13
- Inventor: Lee D. Whetsel
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G01R31/28
- IPC: G01R31/28
Abstract:
An IC includes an IEEE 1149.1 standard test access port (TAP) interface and an additional Off-Chip TAP interface. The Off-Chip TAP interface connects to the TAP of another IC. The Off Chip TAP interface can be selected by a TAP Linking Module on the IC.
Public/Granted literature
- US20130151916A1 INTEGRATED CIRCUIT WITH JTAG PORT, TAP LINKING MODULE, AND OFF-CHIP TAP INTERFACE PORT Public/Granted day:2013-06-13
Information query
