Invention Grant
- Patent Title: Network on chip with an I/O accelerator
- Patent Title (中): 使用I / O加速器的网络芯片
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Application No.: US13785288Application Date: 2013-03-05
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Publication No.: US08726295B2Publication Date: 2014-05-13
- Inventor: Russell D. Hoover , Jon K. Kriegel , Eric O. Mejdrich
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Biggers Kennedy Lenart Spraggins LLP
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F9/44 ; G06F9/46 ; G06F13/00 ; G06F15/00

Abstract:
Data processing on a network on chip (‘NOC’) that includes IP blocks, routers, memory communications controllers, and network interface controllers; each IP block adapted to a router through a memory communications controller and a network interface controller; each memory communications controller controlling communication between an IP block and memory; each network interface controller controlling inter-IP block communications through routers; each IP block adapted to the network by a low latency, high bandwidth application messaging interconnect comprising an inbox and an outbox; a computer software application segmented into stages, each stage comprising a flexibly configurable module of computer program instructions identified by a stage ID with each stage executing on a thread of execution on an IP block; and at least one of the IP blocks comprising an input/output (‘I/O’) accelerator that administers at least some data communications traffic to and from the at least one IP block.
Public/Granted literature
- US20130179902A1 Network On Chip With An I/O Accelerator Public/Granted day:2013-07-11
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