Invention Grant
- Patent Title: Multi-layer board manufacturing method thereof
- Patent Title (中): 多层板制造方法
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Application No.: US12140042Application Date: 2008-06-16
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Publication No.: US08726495B2Publication Date: 2014-05-20
- Inventor: Osamu Nakao , Reiji Higuchi , Syouji Ito , Masahiro Okamoto
- Applicant: Osamu Nakao , Reiji Higuchi , Syouji Ito , Masahiro Okamoto
- Applicant Address: JP Tokyo
- Assignee: Fujikura Ltd.
- Current Assignee: Fujikura Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2003-035330 20030213
- Main IPC: H05K3/20
- IPC: H05K3/20

Abstract:
A base material (20) is arranged on top of at least one first internal layer base material (10), and a second internal base material (30) is arranged underneath the base material (10). And thereafter a surface layer circuitry conductive foil (40) is arranged underneath the base material (30), and subsequently these materials are colaminated for forming a colaminated body (80). While this colaminating operation, conductive portions being formed in the base materials 10, 30 are aligned to electrically connect one another for forming an internal circuitry. And thereafter, an interlayer conductive portion (51) being electrically connected to the internal circuitry is formed, and a minute circuitry is formed on the top of the base material (20) and the conductive foil (40) accordingly.
Public/Granted literature
- US20080250634A1 MULTI-LAYER BOARD MANUFACTURING METHOD THEREOF Public/Granted day:2008-10-16
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