Invention Grant
US08729600B2 Insulated gate bipolar transistor (IGBT) with hole stopper layer
有权
绝缘栅双极晶体管(IGBT),带有阻塞层
- Patent Title: Insulated gate bipolar transistor (IGBT) with hole stopper layer
- Patent Title (中): 绝缘栅双极晶体管(IGBT),带有阻塞层
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Application No.: US13534530Application Date: 2012-06-27
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Publication No.: US08729600B2Publication Date: 2014-05-20
- Inventor: Yukio Tsuzuki , Kenji Kouno , Hiromitsu Tanabe
- Applicant: Yukio Tsuzuki , Kenji Kouno , Hiromitsu Tanabe
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2011-148138 20110704; JP2012-094769 20120418
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A semiconductor device has a first conductivity-type semiconductor substrate, second conductivity-type channel regions, and second conductivity-type thinning-out regions. The channel regions and the thinning-out regions are formed adjacent to a substrate surface of the semiconductor substrate. Further, a hole stopper layer is formed in each of the thinning-out regions to divide the thinning-out region into a first part adjacent to the substrate surface and a second part adjacent to a bottom of the thinning-out region. The hole stopper layer has an area density of equal to or less than 4.0×1012 cm−2 to permit a depletion layer to punch through the hole stopper layer, thereby to restrict breakdown properties from being decreased.
Public/Granted literature
- US20130009205A1 SEMICONDUCTOR DEVICE Public/Granted day:2013-01-10
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