Invention Grant
- Patent Title: Semiconductor device having a high stress material layer
- Patent Title (中): 具有高应力材料层的半导体器件
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Application No.: US11335341Application Date: 2006-01-18
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Publication No.: US08729635B2Publication Date: 2014-05-20
- Inventor: Kuan-Po Chen , Mu-Yi Liu
- Applicant: Kuan-Po Chen , Mu-Yi Liu
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX International Co., Ltd.
- Current Assignee: MACRONIX International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L21/331
- IPC: H01L21/331 ; H01L29/78

Abstract:
A semiconductor device is provided. The semiconductor device comprises a substrate, a stacked gate structure, doped regions and high stress material layers. The stacked gate structure is located on the substrate. The stacked gate structure includes at least a dielectric layer and a gate sequentially disposed over the substrate. The doped regions are disposed in the substrate on each side of the stacked gate structure. The high stress material layers are disposed on the substrate to cover the doped regions. The high stress material layers can increase the mobility of the carriers in the doped regions and hence accelerate the operating speed of the device.
Public/Granted literature
- US20070164370A1 Semiconductor device and fabricating method thereof Public/Granted day:2007-07-19
Information query
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