Invention Grant
- Patent Title: Multilayer dielectric memory device
- Patent Title (中): 多层介质存储器件
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Application No.: US14039543Application Date: 2013-09-27
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Publication No.: US08729704B2Publication Date: 2014-05-20
- Inventor: Kyu S. Min
- Applicant: Kyu S. Min
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/4763 ; H01L21/44

Abstract:
A memory device has multiple dielectric barrier regions. A memory device has multiple barrier regions that provide higher or lower current-voltage slope compared to a memory device having a single barrier region. The device also has electrode regions that provide further control over the current-voltage relationship.
Public/Granted literature
- US20140091429A1 MULTILAYER DIELECTRIC MEMORY DEVICE Public/Granted day:2014-04-03
Information query
IPC分类: