Invention Grant
US08730067B2 Optimized multi-level finite state machine with redundant DC nodes
有权
具有冗余DC节点的优化多级有限状态机
- Patent Title: Optimized multi-level finite state machine with redundant DC nodes
- Patent Title (中): 具有冗余DC节点的优化多级有限状态机
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Application No.: US13564836Application Date: 2012-08-02
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Publication No.: US08730067B2Publication Date: 2014-05-20
- Inventor: Wu Chang , Fan Zhang , Ming Jin , Xuebin Wu , Shaohua Yang
- Applicant: Wu Chang , Fan Zhang , Ming Jin , Xuebin Wu , Shaohua Yang
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Agency: Suiter Swantz pc llo
- Main IPC: H03M5/14
- IPC: H03M5/14

Abstract:
A method and system for eliminating/suppressing long transition runs over a communications channel is disclosed. The method may include providing modulation coding based on a multi-level finite state machine (ML-FSM) having a periodic structure, the periodic structure being defined by a predetermined number of time frames. The ML-FSM may include a plurality of penalty-free edges for connecting nodes in one time frame to nodes at the same level in a subsequent time frame and a plurality of penalty edges for connecting nodes in one time frame to nodes at an upper level in the subsequent time frame. The method may further include utilizing the ML-FSM based modulation coding to facilitate data transmission over the communications channel.
Public/Granted literature
- US20140035692A1 OPTIMIZED MULTI-LEVEL FINITE STATE MACHINE WITH REDUNDANT DC NODES Public/Granted day:2014-02-06
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