Invention Grant
- Patent Title: Spur reduction circuit
- Patent Title (中): 减速电路
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Application No.: US13561507Application Date: 2012-07-30
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Publication No.: US08730076B2Publication Date: 2014-05-20
- Inventor: Hashem Zare-Hoseini , Shuja Hussain Andrabi
- Applicant: Hashem Zare-Hoseini , Shuja Hussain Andrabi
- Applicant Address: GB Cambridge
- Assignee: Cambridge Silicon Radio Limited
- Current Assignee: Cambridge Silicon Radio Limited
- Current Assignee Address: GB Cambridge
- Agency: RatnerPrestia
- Main IPC: H03M1/20
- IPC: H03M1/20
Abstract:
A circuit for modulating an input signal including a dither signal generator configured to generate a first dither signal having a maximum amplitude, a deamplifier configured to reduce the amplitude of said input signal so as to generate a deamplified input signal having a maximum amplitude that is comparable to the maximum amplitude of the dither signal, and a summer configured to sum the dither signal with the deamplified input signal.
Public/Granted literature
- US20140028374A1 SPUR REDUCTION CIRCUIT Public/Granted day:2014-01-30
Information query
IPC分类:
