Invention Grant
- Patent Title: Semiconductor device for accelerating erase verification process and method therefor
- Patent Title (中): 用于加速擦除验证过程的半导体器件及其方法
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Application No.: US13351361Application Date: 2012-01-17
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Publication No.: US08730739B2Publication Date: 2014-05-20
- Inventor: Tony Chan
- Applicant: Tony Chan
- Applicant Address: TW
- Assignee: Eon Silicon Solution Inc.
- Current Assignee: Eon Silicon Solution Inc.
- Current Assignee Address: TW
- Agency: Schmeiser, Olsen & Watts, LLP
- Main IPC: G11C16/24
- IPC: G11C16/24

Abstract:
A semiconductor device and a method for accelerating erase verification process thereof are introduced, in which a correction unit of erase verification is connected between broken bit lines of the semiconductor device and a page buffer. Grounding switches in the correction unit of erase verification are allowed to connect the broken bit lines to ground during an erase verification process by means of a specific circuit arrangement with respect to the broken lines. Thereby, the earth voltage is received, and further, that the broken bit lines pass the erase verification is identified by the page buffer, further saving time consumed in repeated verifications in the conventional technology significantly.
Public/Granted literature
- US20130182508A1 SEMICONDUCTOR DEVICE FOR ACCELERATING ERASE VERIFICATION PROCESS AND METHOD THEREFOR Public/Granted day:2013-07-18
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